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SPC700: implement RET/RET1
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twvd committed Nov 25, 2023
1 parent e6a864c commit aa9a4c6
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Showing 2 changed files with 24 additions and 2 deletions.
22 changes: 22 additions & 0 deletions src/snes/cpu_spc700/cpu.rs
Original file line number Diff line number Diff line change
Expand Up @@ -283,6 +283,28 @@ where
InstructionType::DAA => self.op_daa(),
InstructionType::DAS => self.op_das(),
InstructionType::JMP => self.op_jmp(instr),
InstructionType::RET => {
// Discarded read + internal cycle
self.read_tick(self.regs.read(Register::PC));
self.tick_bus(1)?;

let pc = self.pop16();
self.regs.write(Register::PC, pc);

Ok(())
}
InstructionType::RET1 => {
// Discarded read + internal cycle
self.read_tick(self.regs.read(Register::PC));
self.tick_bus(1)?;

let flags = self.pop8();
self.regs.write(Register::PSW, flags.into());
let pc = self.pop16();
self.regs.write(Register::PC, pc);

Ok(())
}
_ => todo!(),
}
}
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4 changes: 2 additions & 2 deletions src/test/processortests_spc700.rs
Original file line number Diff line number Diff line change
Expand Up @@ -303,7 +303,7 @@ cpu_test!(instr_6a, 0x6a);
cpu_test!(instr_6d, 0x6d);
// Read indirection during fetch
cpu_test_no_trace!(instr_6e, 0x6e);
//cpu_test!(instr_6f, 0x6f);
cpu_test!(instr_6f, 0x6f);
cpu_test!(instr_70, 0x70);
cpu_test!(instr_71, 0x71);
cpu_test!(instr_72, 0x72);
Expand All @@ -320,7 +320,7 @@ cpu_test!(instr_7a, 0x7a);
//cpu_test!(instr_7c, 0x7c);
cpu_test!(instr_7d, 0x7d);
cpu_test!(instr_7e, 0x7e);
//cpu_test!(instr_7f, 0x7f);
cpu_test!(instr_7f, 0x7f);
cpu_test!(instr_80, 0x80);
cpu_test!(instr_81, 0x81);
cpu_test!(instr_82, 0x82);
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