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3.5 stm32 bootloader support #39

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3.5 stm32 bootloader support #39

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439da28
soc: arm: stm32: Add ROM bootloader support
petejohanson Dec 2, 2024
0f1497b
arm: stm32: Add DTS describing ROM bootloader for f0/f4
petejohanson Dec 2, 2024
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6 changes: 6 additions & 0 deletions dts/arm/st/f0/stm32f072.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,12 @@
soc {
compatible = "st,stm32f072", "st,stm32f0", "simple-bus";

rom_bootloader: rom_bootloader@0x1FFFC800 {
compatible = "st,stm32-bootloader";
reg = <0x1FFFC800 DT_SIZE_K(12)>;
status = "reserved";
};

can1: can@40006400 {
compatible = "st,stm32-bxcan";
reg = <0x40006400 0x400>;
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6 changes: 6 additions & 0 deletions dts/arm/st/f4/stm32f401.dtsi
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Expand Up @@ -18,6 +18,12 @@
soc {
compatible = "st,stm32f401", "st,stm32f4", "simple-bus";

rom_bootloader: rom_bootloader@0x1FFF0000 {
compatible = "st,stm32-bootloader";
reg = <0x1FFF0000 DT_SIZE_K(29)>;
status = "reserved";
};

spi2: spi@40003800 {
compatible = "st,stm32-spi";
#address-cells = <1>;
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7 changes: 7 additions & 0 deletions dts/arm/st/f4/stm32f411.dtsi
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Expand Up @@ -10,6 +10,13 @@
soc {
compatible = "st,stm32f411", "st,stm32f4", "simple-bus";


rom_bootloader: rom_bootloader@0x1FFF0000 {
compatible = "st,stm32-bootloader";
reg = <0x1FFF0000 DT_SIZE_K(29)>;
status = "reserved";
};

spi5: spi@40015000 {
compatible = "st,stm32-spi";
#address-cells = <1>;
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1 change: 1 addition & 0 deletions soc/arm/st_stm32/common/CMakeLists.txt
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Expand Up @@ -5,6 +5,7 @@ zephyr_sources(stm32cube_hal.c)
zephyr_linker_sources_ifdef(CONFIG_STM32_CCM SECTIONS ccm.ld)

zephyr_sources_ifdef(CONFIG_STM32_BACKUP_SRAM stm32_backup_sram.c)
zephyr_sources_ifdef(CONFIG_STM32_BOOTLOADER stm32_bootloader.c)
zephyr_linker_sources_ifdef(CONFIG_STM32_BACKUP_SRAM SECTIONS stm32_backup_sram.ld)

zephyr_sources(soc_config.c)
11 changes: 11 additions & 0 deletions soc/arm/st_stm32/common/Kconfig.soc
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Expand Up @@ -15,6 +15,17 @@ config STM32_BACKUP_SRAM
help
Enable support for STM32 backup SRAM.


config HAS_STM32_BOOTLOADER
def_bool $(dt_compat_enabled,$(DT_COMPAT_ST_STM32_BOOTLOADER))

config STM32_BOOTLOADER
bool "STM32 Bootloader Support"
default HAS_STM32_BOOTLOADER
depends on RETENTION_BOOT_MODE
help
Enable support for jumping into the STM32 when the bootmode is set.

config USE_STM32_ASSERT
depends on ASSERT
bool "STM32Cube HAL and LL drivers asserts"
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55 changes: 55 additions & 0 deletions soc/arm/st_stm32/common/stm32_bootloader.c
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@@ -0,0 +1,55 @@
/*
* Copyright (c) 2020 Google LLC.
*
* SPDX-License-Identifier: Apache-2.0
*/

#include <soc.h>
#include <zephyr/init.h>
#include <zephyr/retention/retention.h>
#include <zephyr/retention/bootmode.h>
#include <stm32_ll_system.h>

static const uint32_t bootloader = DT_REG_ADDR(DT_INST(0, st_stm32_bootloader));
static FUNC_NORETURN void jump_to_bootloader(void)
{
uint32_t i = 0;
void (*jmp)(void);

__disable_irq();

SysTick->CTRL = 0;
SysTick->LOAD = 0;
SysTick->VAL = 0;

for (i = 0; i < sizeof(NVIC->ICER) / sizeof(NVIC->ICER[0]); i++)

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OPEN_BRACE 

soc/arm/st_stm32/common/stm32_bootloader.c:25  that open brace { should be on the previous line

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ARRAY_SIZE 

soc/arm/st_stm32/common/stm32_bootloader.c:25  Prefer ARRAY_SIZE(NVIC->ICER)
{
NVIC->ICER[i] = 0xFFFFFFFF;
NVIC->ICPR[i] = 0xFFFFFFFF;
}

LL_SYSCFG_SetRemapMemory(LL_SYSCFG_REMAP_SYSTEMFLASH);

jmp = (void (*)(void)) (void (*)(void)) (*((uint32_t *) ((bootloader + 4))));

__set_CONTROL(0);
__set_MSP(*(uint32_t *)bootloader);

__enable_irq();

jmp();

while (1) { }

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TRAILING_STATEMENTS 

soc/arm/st_stm32/common/stm32_bootloader.c:42  trailing statements should be on next line
}

static int bootloader_check_boot_init(void)
{
if (bootmode_check(BOOT_MODE_TYPE_BOOTLOADER) > 0) {
bootmode_clear();
jump_to_bootloader();
}

return 0;
}

SYS_INIT(bootloader_check_boot_init, EARLY, 0);
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