changed TIm1 ISR to proces only CC or Overflow

Met4FoF · Jul 19, 2021 · 44d4af5 · 44d4af5
1 parent adde016
commit 44d4af5
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Showing 7 changed files with 201 additions and 143 deletions.
diff --git a/Inc/FreeRTOSConfig.h b/Inc/FreeRTOSConfig.h
@@ -104,7 +104,7 @@ function. */
 routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
 INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
 PRIORITY THAN THIS! (higher priorities are lower numeric values. */
-#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 4
 
 /* Interrupt priorities used by the kernel port layer itself.  These are generic
 to all Cortex-M ports, and do not rely on any particular library functions. */

diff --git a/Inc/tim64extender.h b/Inc/tim64extender.h
@@ -19,6 +19,11 @@
 
 uint64_t TIM_Get_64Bit_TimeStamp_IC(TIM_HandleTypeDef * htim);
 uint64_t TIM_Get_64Bit_TimeStamp_Base(TIM_HandleTypeDef * htim);
+void 	 TIM1_Increase_Upper_bitmask();
+void     HAL_TIM_IRQHandlerOnlyCC(TIM_HandleTypeDef *htim);
+
+
+
 #ifdef __cplusplus
 }
 #endif

diff --git a/Src/freertos.cpp b/Src/freertos.cpp
@@ -960,6 +960,7 @@ void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef * htim) {
 			if (GPSUARTDMA_START_result != HAL_OK) {
 				SEGGER_RTT_printf(0, "DMA start ERROR ");
 				switch(GPSUARTDMA_START_result){
+				case HAL_OK: break;
 				case HAL_ERROR: SEGGER_RTT_printf(0, "HAL_ERROR\n");HAL_DMA_Abort(&hdma_uart7_rx); break;
 				case HAL_BUSY: SEGGER_RTT_printf(0, "HAL_BUSY\n");HAL_DMA_Abort(&hdma_uart7_rx); break;
 				case HAL_TIMEOUT:SEGGER_RTT_printf(0, "HAL_TIMEOUT\n");HAL_DMA_Abort(&hdma_uart7_rx); break;

diff --git a/Src/stm32f7xx_it.c b/Src/stm32f7xx_it.c
@@ -22,6 +22,7 @@
 #include "main.h"
 #include "stm32f7xx_it.h"
 #include "cmsis_os.h"
+#include "tim64extender.h"
 /* Private includes ----------------------------------------------------------*/
 /* USER CODE BEGIN Includes */
 /* USER CODE END Includes */
@@ -112,11 +113,8 @@ void MemManage_Handler(void)
   /* USER CODE BEGIN MemoryManagement_IRQn 0 */
 
   /* USER CODE END MemoryManagement_IRQn 0 */
-  while (1)
-  {
-    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
-    /* USER CODE END W1_MemoryManagement_IRQn 0 */
-  }
+	SEGGER_RTT_printf(0,"Oh no MemManageFault :( Reseting MCU");
+	NVIC_SystemReset();
 }
 
 /**
@@ -128,7 +126,8 @@ void BusFault_Handler(void)
 		HAL_GPIO_WritePin(SIG_HARDFAULT_GPIO_Port, SIG_HARDFAULT_Pin, GPIO_PIN_SET);
 	  /* USER CODE END HardFault_IRQn 0 */
 	   /* USER CODE BEGIN W1_HardFault_IRQn 0 */
-		SEGGER_RTT_printf(0,"Oh no BusFault :( Doing noting");
+		SEGGER_RTT_printf(0,"Oh no BusFault :( Reseting MCU");
+		NVIC_SystemReset();
 	    /* USER CODE END W1_HardFault_IRQn 0 */
 }
 
@@ -137,7 +136,6 @@ void BusFault_Handler(void)
   */
 void UsageFault_Handler(void)
 {
-	SEGGER_SYSVIEW_RecordEnterISR();
   /* USER CODE BEGIN UsageFault_IRQn 0 */
 
   /* USER CODE END UsageFault_IRQn 0 */
@@ -218,7 +216,9 @@ void TIM1_UP_TIM10_IRQHandler(void)
   /* USER CODE BEGIN TIM1_UP_TIM10_IRQn 0 */
 
   /* USER CODE END TIM1_UP_TIM10_IRQn 0 */
-  HAL_TIM_IRQHandler(&htim1);
+  //HAL_TIM_IRQHandler(&htim1);
+	__HAL_TIM_CLEAR_IT(&htim1, TIM_IT_UPDATE);// clear update status bit
+  TIM1_Increase_Upper_bitmask();
   /* USER CODE BEGIN TIM1_UP_TIM10_IRQn 1 */
 
   /* USER CODE END TIM1_UP_TIM10_IRQn 1 */
@@ -232,7 +232,7 @@ void TIM1_CC_IRQHandler(void)
   /* USER CODE BEGIN TIM1_CC_IRQn 0 */
 
   /* USER CODE END TIM1_CC_IRQn 0 */
-  HAL_TIM_IRQHandler(&htim1);
+	HAL_TIM_IRQHandlerOnlyCC(&htim1);
   /* USER CODE BEGIN TIM1_CC_IRQn 1 */
 
   /* USER CODE END TIM1_CC_IRQn 1 */

diff --git a/Src/tim.c b/Src/tim.c
@@ -163,9 +163,9 @@ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle)
     HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
 
     /* TIM1 interrupt Init */
-    HAL_NVIC_SetPriority(TIM1_UP_TIM10_IRQn, 5, 0);
+    HAL_NVIC_SetPriority(TIM1_UP_TIM10_IRQn, 4, 0);// tim1 higher prio than tim2 since its overflowing more often
     HAL_NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn);
-    HAL_NVIC_SetPriority(TIM1_CC_IRQn, 5, 0);
+    HAL_NVIC_SetPriority(TIM1_CC_IRQn, 4, 0);// tim1 higher prio than tim2 since its overflowing more often
     HAL_NVIC_EnableIRQ(TIM1_CC_IRQn);
   /* USER CODE BEGIN TIM1_MspInit 1 */