Willoe v0.5 (ReAgnus)
Willoe is a drop-in replacement for Agnus on ECS Amigas.
Presently, Willoe's planned feature set include full AGA compatibility when paired with other AGA-compatible parts, up to 8MB of chip RAM, CPU and DMA cache and 2x and 4x DMA modes for all DMA channels including sprites, bitplanes, disk, audio, blitter and copper.
It supports up to four configurations, set with the two small solder bridges.
| cgf 1 | cfg 2 | Mode |
|---|---|---|
| open | open | 8327b PAL |
| open | closed | 8327b NTSC |
| closed | open | 8375 PAL |
| closed | closed | 8375 NTSC |
TBD: In any mode, 2MB is the default, but the board does have 8MB on board. The mechanism to unlock this memory is yet to be determined. Once enabled, AmigaOS will need a patch to see it and this will cause obvious conflict with any Zorro II memory.
Willoe separates the data bus from chip RAM allowing both to be active at the same time but doing different things.
The on board RAM is fast enough to perform a 64-bit read per 7MHz clock cycle without caching. Regardless of the FMODE, Willoe will always read all (aligned) 64-bytes from the address requested if it is not already cached and add this to the cache. Thus, in 1x and 2x modes, Willoe automagically uses as little as 25% or 50% bus time.
If the custom Gary is also present, then Willoe can also enable its CPU side cache. This also can fetch data from chip RAM 64-bytes at a time and save chip RAM bus time by up to 75%.
Neither cache is terribly large, but combined together can reduce DMA contention around 80%. Because it does make timing unpredictable, this should not be enabled when running classic games.
AGA introduced the fetch-mode for the bitplanes and sprites allowing bigger sprites, more colour depth (up to 8bpp) at resolutions up to super hires. It did not, however, fix this for everything, and the circa-1984 blitter and copper were left wanting. Willoe adds 2x and 4x fetch modes to every DMA channel. All of them.
This means a blitter that can run twice or four times as fast. A copper that can run twice or four times as fast. Disk access opening the door to PC floppies that aren't RPM nerfed. And audio playing at an insane 112kHz (CD audio eat your heart out).
AGA is not enabled by default without the Lisa ID as such, most of these features may be ignored by the operating system. Pumping data to Denise or Paula at faster than expected rates will probably not work. However, in 1x fetch mode, Willoe can still perform read-ahead, freeing bus time, perform CPU caching and will work normally in any existing ECS mode.
The programming header supports either a 10-pin mini SWD connector soldered onto it for semi-permanent attachment of a JTAG probe or a custom TC2050 cable for factory programming. The pinout is NOT compatible with the standard TC2050 and needs an adaptor board from a JLINK to swap the bits, or some jumper cables to accomplish the same. The header on Willoe uses the standard SWD/JTAG arrangement and can program either the SPI flash or the FPGA directly.
I will include the schematics and gerbers for the TC2050 adapter board here.